Title :
Exploiting 0.8-micron ASIC libraries from different venders
Author :
Kurosawa, Atsushi ; Shimada, Shigeru
Author_Institution :
VLSI Technol. Inc., San Jose, CA, USA
Abstract :
An ASIC (application-specific integrated circuit) library development methodology has been developed which requires no rework to import a library element from a different vender using the same process technology. A 0.8-μm scalable, high-density standard cell library using this methodology is discussed. The discussion covers the methodology used to establish compatibility in the areas of process, mask layout, scalable design rules, physical data, standard cell design, logic/delay simulation, and megacell design
Keywords :
application specific integrated circuits; circuit layout CAD; integrated circuit technology; logic CAD; ASIC libraries; application-specific integrated circuit; delay simulation; library development methodology; logic simulation; mask layout; megacell design; process technology; scalable design rules; standard cell library; Application specific integrated circuits; Chip scale packaging; Databases; Design methodology; Libraries; Logic design; Synthesizers; Testing; Very large scale integration; Workstations;
Conference_Titel :
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0015-7
DOI :
10.1109/CICC.1991.164057
