• DocumentCode
    2077405
  • Title

    A methodology for the design of AHB bus master wrappers

  • Author

    Bertola, Marc ; Bois, Guy

  • Author_Institution
    Groupe de Recherche en Microelectronique, Ecole Polytechnique de Montreal, Que., Canada
  • fYear
    2003
  • fDate
    1-6 Sept. 2003
  • Firstpage
    90
  • Lastpage
    95
  • Abstract
    This paper proposes a methodology and a basic structure for the design of wrappers used to adapt cores for use as bus masters. The AMBA AHB protocol is used as a case study in this paper. The first step is to identify the responsibilities of the master. The designer must then develop correspondences between the behavior of the core and the requirements specified by the protocol. The final step is to build a state machine progressively, adding states to compensate for the core´s inability to produce compliant behavior. An example of a wrapper for the ARM7TDMI is then presented.
  • Keywords
    asynchronous circuits; formal verification; system buses; AHB bus master wrapper; AMBA AHB protocol; bus protocol; state machine; Access protocols; Buildings; Design methodology; Guidelines; Hardware; Intellectual property; Libraries; Master-slave; Reduced instruction set computing; Standards development;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design, 2003. Proceedings. Euromicro Symposium on
  • Conference_Location
    Belek-Antalya, Turkey
  • Print_ISBN
    0-7695-2003-0
  • Type

    conf

  • DOI
    10.1109/DSD.2003.1231905
  • Filename
    1231905