DocumentCode :
2078840
Title :
A system-on-chip implementation of the IEEE 802.11a MAC layer
Author :
Panic, Goran ; Dietterle, Daniel ; Stamenkovic, Zoran ; Tittelbach-Helmrich, Klaus
Author_Institution :
IHP GmbH, Frankfurt, Germany
fYear :
2003
fDate :
1-6 Sept. 2003
Firstpage :
319
Lastpage :
324
Abstract :
This work presents an architectural solution for the IEEE 802.11a MAC layer on-chip implementation. The complete implementation flow is presented as well as some unique solutions implemented using an architecture that exploits dedicated hardware for timing critical tasks. The system is completely integrated into a single chip and the implementation results are presented.
Keywords :
access protocols; integrated circuit design; logic simulation; specification languages; system-on-chip; IEEE 802.11a; MAC layer on-chip; hardware-software partitioning; logic synthesis; medium access control; specification and description language; system architecture; system implementation; system-on-chip; timing critical tasks; BiCMOS integrated circuits; Computer architecture; Computer network reliability; Hardware; Logic; Media Access Protocol; Software standards; Standards development; System-on-a-chip; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design, 2003. Proceedings. Euromicro Symposium on
Conference_Location :
Belek-Antalya, Turkey
Print_ISBN :
0-7695-2003-0
Type :
conf
DOI :
10.1109/DSD.2003.1231962
Filename :
1231962
Link To Document :
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