Title :
T&D-Bench+ - a software environment for modeling and simulation of state-of-the-art processors
Author :
Soares, Sandro Neves ; Wagner, Flávio Rech
Author_Institution :
Univ. de Caxias do Sul, Bento Goncalves, Brazil
Abstract :
Environments for modeling and simulation of state-of-the-art processors can be classified into two categories: design and teaching environments. While the former have powerful modeling resources, the latter put emphasis on tracking and steering experiments at simulation time. This paper presents T&D-Bench+ (Teaching and Design Workbench), an environment for modeling and simulation of state-of-the-art processors, including RISC and VLIW processors, DSPs, and microcontrollers.
Keywords :
digital signal processing chips; digital simulation; hardware description languages; logic simulation; object-oriented languages; teaching; RISC processor; Teaching and Design Workbench; VLIW processors; architecture description languages; design environments; digital signal processing; hardware description languages; microcontrollers; modeling languages; software simulation; state-of-the-art processors; Architecture description languages; Computational modeling; Education; Field programmable gate arrays; Hardware design languages; Power system modeling; Process design; Prototypes; Reduced instruction set computing; Visualization;
Conference_Titel :
Digital System Design, 2003. Proceedings. Euromicro Symposium on
Conference_Location :
Belek-Antalya, Turkey
Print_ISBN :
0-7695-2003-0
DOI :
10.1109/DSD.2003.1231968