• DocumentCode
    2079019
  • Title

    An incremental functional simulator implemented on a network of transputers

  • Author

    Dimond, Keith ; Hassan, Samir

  • Author_Institution
    Electron. Eng. Labs., Kent Univ., Canterbury, UK
  • fYear
    1990
  • fDate
    12-15 Mar 1990
  • Firstpage
    296
  • Lastpage
    300
  • Abstract
    This paper describes the organisation of a concurrent functional simulator employing transputers which gives considerably improved performance over conventional simulators. The parallel organisation allows a novel feature, incremental simulation, to be provided which allows the simulator to respond very quickly to design changes thereby allowing the design to proceed with the minimum of delay. The paper describes how the incremental facility is capable of being used to provide a very powerful analysis tool for system operation
  • Keywords
    logic CAD; transputers; analysis tool; incremental functional simulator; network of transputers; parallel organisation; performance; system operation; Computational modeling; Data structures; Delay; Digital systems; Laboratories; Logic; Message passing; Parallel processing; Power system modeling; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1990., EDAC. Proceedings of the European
  • Conference_Location
    Glasgow
  • Print_ISBN
    0-8186-2024-2
  • Type

    conf

  • DOI
    10.1109/EDAC.1990.136662
  • Filename
    136662