DocumentCode :
2079099
Title :
A power reduction scheme for data buses by dynamic detection of active bits
Author :
Muroyama, Masanori ; Hyodo, Akihiko ; Okuma, Takanori ; Yasuura, Hiroto
Author_Institution :
Graduate Sch. of Inf. Sci. & Electr. Eng., Kyushu Univ., Fukuoka, Japan
fYear :
2003
fDate :
1-6 Sept. 2003
Firstpage :
408
Lastpage :
415
Abstract :
To transfer a small number, we inherently need the small number of bits. But all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bits. In this paper, we propose a power reduction scheme for data buses using the active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate 20% - 35% on average and up to 54.2% switching activity reduction.
Keywords :
CMOS integrated circuits; circuit switching; encoding; low-power electronics; power consumption; system buses; CMOS circuit; active bit dynamic detection; active bits; bits detection; data buses; dynamic power; power consumption; power reduction; Arithmetic; Capacitance; Circuits; Clocks; Computer science; Data buses; Data engineering; Design optimization; Digital systems; Energy consumption;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design, 2003. Proceedings. Euromicro Symposium on
Conference_Location :
Belek-Antalya, Turkey
Print_ISBN :
0-7695-2003-0
Type :
conf
DOI :
10.1109/DSD.2003.1231974
Filename :
1231974
Link To Document :
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