DocumentCode
2079866
Title
Capacity metric for Chip Heterogeneous Multiprocessors
Author
Otoom, Mwaffaq ; Paul, JoAnn M.
Author_Institution
Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
fYear
2011
fDate
9-14 Oct. 2011
Firstpage
207
Lastpage
216
Abstract
Chip Heterogeneous Multiprocessors (CHMs) are increasingly used to execute multichannel, heterogeneous workloads, often in the service of single users. Multichannel inputs can be processed at different rates and in a variety of combinations. We show that performance evaluation of the CHMs that process multichannel workloads requires a new performance metric, capacity, which we introduce in this paper. We show how capacity is a successor to throughput, through an automobile production analogy. We include experimental results to illustrate the form and usefulness of the new metric as well as contrast it with Pareto optimization.
Keywords
Pareto optimisation; multiprocessing systems; performance evaluation; Pareto optimization; automobile production analogy; capacity metric; chip heterogeneous multiprocessors; multichannel heterogeneous workload; multichannel input processing; performance evaluation; performance metric; Assembly; Automobiles; Measurement; Pipelines; Production; Shape; Throughput; Capacity Metric; Chip Heterogeneous Multiprocessors; Multichannel Workloads; Performance Evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2011 Proceedings of the 9th International Conference on
Conference_Location
Taipei
Print_ISBN
978-1-4503-0715-4
Type
conf
Filename
6062291
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