Temperature characterisation and parameter extraction for fine-geometry CMOS processes

Modern CMOS processes allow the design of high-speed and high-performance digital and mixed signal products. An important aspect of the design toolset is a set of device models which accurately characterise the process being used. While much attention is usually given to the validation of models at room temperature, the operation of the models at lower and higher temperatures is often neglected. This paper analyses the performance of popular MOS models such as SPICE Level 3, BSIM2 and BSIM3 for predicting the behaviour of MOSFET devices from sub-micron CMOS processes. MOSFETS from 1.O μm and 0.7 μm processes have been measured over the temperature range -50°C to 120°C and model parameter sets extracted at several temperatures. The variation of certain parameters with temperature is shown and the temperature coefficients evaluated. Most models allow at least threshold voltage and low-field mobility to vary with temperature