• DocumentCode
    2080491
  • Title

    SoC-TM: Integrated HW/SW support for transactional memory programming on embedded MPSoCs

  • Author

    Ferri, Cesare ; Bahar, R. Iris ; Marongiu, Andrea ; Benini, Luca ; Herlihy, Maurice ; Lipton, Benjamin ; Moreshet, Tali

  • Author_Institution
    Sch. of Eng., Brown Univ., Providence, RI, USA
  • fYear
    2011
  • fDate
    9-14 Oct. 2011
  • Firstpage
    39
  • Lastpage
    48
  • Abstract
    Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for transactional programming on embedded MP-SoCs. Our proposal leverages a Hardware Transactional Memory (HTM) design, based on a dedicated HW module for conflict management, whose functionality is exposed to the software through compiler directives, implemented as an extension to the popular OpenMP programming model. To further improve ease of programming, our framework supports speculative parallelism, thanks to the ability of enforcing a given commit order in hardware. Our experimental results confirm that SoC-TM is a viable and cost-effective solution for embedded MPSoCs, in terms of energy, performance and productivity.
  • Keywords
    embedded systems; hardware-software codesign; multiprocessing systems; storage management chips; system-on-chip; transaction processing; HTM design; HW/SW support; OpenMP programming; SoC-TM; embedded MPSoC; hardware complexity; hardware transactional memory; speculative parallelism; transactional memory programming; Hardware; Instruction sets; Programming; Protocols; Registers; MPSoC; OpenMP; Speculative parallelism; Transactional Memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2011 Proceedings of the 9th International Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4503-0715-4
  • Type

    conf

  • Filename
    6062316