60GHz CMOS differential and transformer-coupled power amplifier for compact design

Author

LaRocca, Tim ; Chang, Mau-Chung Frank

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA

fYear

2008

fDate

June 17 2008-April 17 2008

Firstpage

65

Lastpage

68

Abstract

A 57-65 GHz differential and transformer-coupled power amplifier using a commercial 90 nm digital CMOS process is presented. On-chip transformers combine bias, stability and input/interstage matching networks for a compact design with an area of 0.15 mm². The three-stage amplifier consumes 70 mA under 1.2 V supply voltage. The small-signal gain generally exceeds 15 dB with saturated output power levels over 12 dBm and associated peak power-added efficiency (PAE) greater than 20% (14% across the band).

Keywords

CMOS integrated circuits; differential amplifiers; millimetre wave amplifiers; power amplifiers; transformers; CMOS differential power amplifier; CMOS process; current 70 mA; frequency 57 GHz to 65 GHz; input/interstage matching networks; on-chip transformers; peak power-added efficiency; size 90 nm; small-signal gain; three-stage amplifier; transformer-coupled power amplifier; voltage 1.2 V; CMOS process; CMOS technology; Differential amplifiers; Frequency; High power amplifiers; Impedance matching; Millimeter wave technology; Power amplifiers; Radiofrequency amplifiers; Transformers; CMOS; differential amplifiers; millimeter wave amplifiers; power amplifiers; transformers;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE

Conference_Location

Atlanta, GA

ISSN

1529-2517

Print_ISBN

978-1-4244-1808-4

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2008.4561387

Filename

4561387