DocumentCode :
2081512
Title :
Detection of multiple input bridging and stuck-on faults in CMOS logic circuits using current monitoring
Author :
Jha, Niraj K. ; Tong, Qiao
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
fYear :
1990
fDate :
12-15 Mar 1990
Firstpage :
350
Lastpage :
354
Abstract :
Current monitoring is a well-established technique for detecting stuck-on and bridging faults in CMOS logic circuits. When such faults are activated by an appropriate vector, the circuit draws current which is much larger than normal and the fault is detected. The authors first show that any test set, which detects all single stuck-at faults in any irredundant combinational CMOS logic circuit, also detects all multiple stuck-on faults in it using current monitoring. If the constituent gates of the circuit are all primitive CMOS gates (NAND, NOR, NOT) then the authors show that the test set detects all multiple stuck-on and input bridging faults (even if the two types of faults occur simultaneously) with current monitoring. Even when the CMOS circuit is redundant the authors have found that in most cases a test set that detects all detectable single stuck-at faults also has a very high coverage for the multiple stuck-on and input bridging faults and their combinations
Keywords :
CMOS integrated circuits; combinatorial circuits; integrated logic circuits; logic testing; CMOS logic circuits; NAND; NOR; NOT; combinational circuits; current monitoring; multiple input bridging detection; stuck-on faults; CMOS logic circuits; CMOS technology; Circuit faults; Circuit testing; Delay; Electrical fault detection; Fault detection; Logic testing; Monitoring; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location :
Glasgow
Print_ISBN :
0-8186-2024-2
Type :
conf
DOI :
10.1109/EDAC.1990.136672
Filename :
136672
Link To Document :
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