PIMM1, an image processing ASIC based on mathematical morphology

Author

Klein, Jean Claude ; Peyrard, René

Author_Institution

Ecole Nat. Superieure des Mines de Paris, Fontainebleau, France

fYear

1989

fDate

25-28 Sep 1989

Lastpage

37987

Abstract

To meet image analysis requirements in terms of processing speed and computing capacities, the authors have developed an ASIC (application-specific integrated circuit) with a programmable architecture, supporting the latest algorithms of mathematical morphology. Designed in 1.5-μm CMOS technology, the ASIC can process 8-b images at a 20-MHz pixel frequency, in pipeline or in parallel. The architecture of PIMM1 is discussed, along with two multiprocessor organizations

Keywords

CMOS integrated circuits; application specific integrated circuits; computerised picture processing; digital signal processing chips; pipeline processing; 1.5 micron; ASIC; image analysis requirements; image processing ASIC; mathematical morphology; multiprocessor organizations; parallel; pipeline; pixel frequency; processing speed; programmable architecture; Application specific integrated circuits; CMOS process; CMOS technology; Circuit analysis computing; Computer architecture; Image analysis; Image processing; Integrated circuit technology; Morphology; Pixel;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/ASIC.1989.123209

Filename

123209

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2081955