DocumentCode
2082533
Title
A transfer-curve-folded DCO in 0.13μm CMOS
Author
Zhan, Jing-Hong Conan ; Chang, Hsiang-Hui ; Wang, Ping-Ying
Author_Institution
RF Div., MediaTek, Hsinchu
fYear
2008
fDate
June 17 2008-April 17 2008
Firstpage
391
Lastpage
394
Abstract
A DCO which achieves fine frequency resolution, provides interface controls for all-digital PLLs, and has a folded transfer curve to avoid frequency discontinuity is presented. The DCO occupies 520 mum times 780 mum, uses 20 mA current and operates from 3.2 GHz to 4.0 GHz. Its phase noise at 400 kHz, 3 MHz and 20 MHz are -117.3, -135.9 and -153.3 dBc/Hz, respectively. Its frequency coverage range and the phase noise satisfy requirements for GSM/GPRS/EDGE applications.
Keywords
CMOS digital integrated circuits; digital phase locked loops; oscillators; phase noise; CMOS; EDGE; GPRS; GSM; all-digital PLL; frequency 3.2 GHz to 4 GHz; frequency discontinuity; phase noise; transfer-curve-folded DCO; CMOS technology; Circuits; Digital control; Digital filters; Frequency conversion; Phase locked loops; Phase noise; Target tracking; Voltage control; Voltage-controlled oscillators; CMOS; DCO; VCO; phase noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE
Conference_Location
Atlanta, GA
ISSN
1529-2517
Print_ISBN
978-1-4244-1808-4
Electronic_ISBN
1529-2517
Type
conf
DOI
10.1109/RFIC.2008.4561461
Filename
4561461
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