A 25 MOPS systolic integer divider IC

The divide function in signal processing systems is, in many instances, unavoidable, particularly when implementing range scaling, matrix operations, or perspective transforms, in system applications such as workstations, radar systems, and image processors. Traditionally this need has been fulfilled at the expense of reduced system speed and efficiency by relying on converging recursive techniques to carry out the division operation. The author reports the design and implementation of a 32-b fixed-point integer divider. The CMOS chip performs two´s-complement integer division of 32-b dividends and 16-b divisors without prenormalization, to produce a 32-b output quotient