The bonded wafer silicon on insulator approach to high performance low power integrated circuits

This paper describes R.F. circuits designed on a silicon on insulator (SOI) process. In circuit terms, compared with bulk silicon processes, SOI offers the advantages of low parasitic capacitance per transistor and small active area for a specific critical dimension, which can be translated into small chip area and hence, ultimately, high yield. It can also enable wide bandwidth operation at low power levels. The circuits have shown wider R.F. bandwidth, faster switching time and even lower noise performance than their bulk equivalents