• DocumentCode
    2082967
  • Title

    Can CMOS resist the BiCMOS challenge?

  • Author

    Wissel, L. ; Gould, Elliot

  • Author_Institution
    IBM Gen. Technol. Div., Essex Junction, VT, USA
  • fYear
    1991
  • fDate
    12-15 May 1991
  • Abstract
    It is pointed out that the traditional CMOS-BiCMOS comparison of isolated circuits driving capacitive loads is not adequate. When multistage circuits and chip wiring resistance are also considered, CMOS is shown to be very competitive. In a high-performance BiCMOS logic chip design, 96% of the circuits can be converted to CMOS. For low-capacitance nets and nets with enough delay margin, CMOS is the clear preference due to its better density, circuit simplicity, lower sensitivity to wiring resistance, lower dl/dt and clear migration path to the next technology generation. CMOS is expected to remain the dominant circuit type for logic
  • Keywords
    CMOS integrated circuits; integrated circuit technology; integrated logic circuits; CMOS; chip wiring resistance; circuit simplicity; delay margin; density; logic chip design; low-capacitance nets; migration path; multistage circuits; Adders; BiCMOS integrated circuits; CMOS logic circuits; Capacitance; Chip scale packaging; Circuit optimization; Inverters; Resists; Voltage; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-0015-7
  • Type

    conf

  • DOI
    10.1109/CICC.1991.164083
  • Filename
    164083