Low-complexity high-performance LDPC decoder for CMMB

A low-complexity semi-parallel low density parity check (LDPC) decoder for China Mobile Multimedia Broadcasting (CMMB) system is designed based on the structure of LDPC codes. The designed decoder utilizes turbo decoding message passing algorithm. A new memory compressing strategy for message updating was proposed, which can reduce more than 50% memories. By using them appropriately, two different code rates can reuse memories without increasing any hardware resource. The decoder is implemented on FPGA of Altera Stratix II. The throughput of the LDPC decoder is up to 40Mbps under CMMB work point, which can fulfill the request of real time decoding.