Scalable statistical measurement and estimation of a mmWave CML static divider sensitivity in 65nm SOI CMOS

Author

Kim, Daeik D. ; Cho, Choongyeun ; Jonghae Kim

Author_Institution

IBM Semicond. R&D Center, Hopewell Junction, NY

fYear

2008

fDate

June 17 2008-April 17 2008

Firstpage

625

Lastpage

628

Abstract

A CML static divider operates up to 82.4 GHz with 90% yield for 0 dBm input is statistically measured and estimated. The proposed method of statistical measurement enables reliable sensitivity curve estimation by 55% of standard variation, based on the analytic model, simulations, and scalable DC and RF measurements for the first time. A 300 mm full wafer is scanned for the validation.

Keywords

CMOS logic circuits; current-mode logic; frequency dividers; millimetre wave devices; sensitivity analysis; silicon-on-insulator; statistical analysis; SOI CMOS; mmWave CML static divider sensitivity; sensitivity curve estimation; statistical measurement; CMOS process; CMOS technology; Frequency estimation; Phase locked loops; Radio frequency; Spectral analysis; Testing; Time measurement; Voltage-controlled oscillators; Yield estimation; 65nm SOI CMOS; mmWave CML static divider; process-induced variation; scalable measurement and statistical performance estimation; sensitivity curve;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE

Conference_Location

Atlanta, GA

ISSN

1529-2517

Print_ISBN

978-1-4244-1808-4

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2008.4561515

Filename

4561515