• DocumentCode
    2083986
  • Title

    ASIC design project scheduling

  • Author

    Easley, Steven J. ; Freeman, Eugene E. ; Steele, David P.

  • Author_Institution
    NCR Corp., Colorado Springs, CO, USA
  • fYear
    1989
  • fDate
    25-28 Sep 1989
  • Lastpage
    38018
  • Abstract
    With the market-driven need to reduce product development times in the face of increasing complexity, the ability to forecast ASIC (application-specific integrated circuit) development time has become of paramount importance. The authors present techniques to forecast schedules more accurately, to minimize risks, and to improve productivity on a continuing basis. They found that it is critical to have a specification and a resource team; otherwise, schedule slips are almost certain. They point out that during the development process, tradeoffs must be made by the ASIC designer. To do so effectively, he or she must understand the end application. Risks need assessing and contingency planning. Scheduling itself must be addressed in three senses: future (forecasts), present (monitors) and past (data). The historical database helps to forecast as well as to identify opportunities for productivity improvement
  • Keywords
    application specific integrated circuits; integrated circuit technology; scheduling; ASIC design project scheduling; application-specific integrated circuit; development process; historical database; productivity improvement; scheduling forecast; Application specific integrated circuits; Chip scale packaging; Costs; Economic forecasting; Job shop scheduling; Logic; Manufacturing; Process design; Systems engineering and theory; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
  • Conference_Location
    Rochester, NY
  • Type

    conf

  • DOI
    10.1109/ASIC.1989.123233
  • Filename
    123233