Distribution of the noise voltage in the matrix VLSI with orthogonal topology of power supply feeding

Author

Vasiltsov, I. ; Mandziy, B. ; Bench, A.

Author_Institution

Inst. of Comput. Inf., Ternopil Acad. of Nat. Technol., Ukraine

fYear

2001

fDate

12-17 Feb. 2001

Firstpage

98

Abstract

Summary form only given. In this paper a new three-dimensional mathematical model of internal conductive noise in the matrix VLSI with orthogonal topology of power supply feeding has been discussed. Obtained relations allow for the developer to compare different alternative variants of structure realization of digital devices. The obtained results are useful for the place-and-route procedure of development - and/or. manufacturing digital devices, implemented on the matrix VLSI.

Keywords

VLSI; integrated circuit layout; integrated circuit modelling; integrated circuit noise; integrated circuit reliability; network topology; voltage distribution; 3D mathematical model; digital devices; internal conductive noise; matrix VLSI; noise voltage distribution; orthogonal topology; place-and-route procedure; power supply feeding; three-dimensional model; Communication switching; Electromagnetic interference; Logic gates; Manufacturing; Mathematical model; Modems; Power supplies; Topology; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

CAD Systems in Microelectronics, 2001. CADSM 2001. Proceedings of the 6th International Conference. The Experience of Designing and Application of

Conference_Location

Lviv-Slavsko, Ukraine

Print_ISBN

966-553-079-8

Type

conf

DOI

10.1109/CADSM.2001.975760

Filename

975760