DocumentCode
2085195
Title
Models of ICs schematic vulnerability to local temperatures: development and analysis
Author
Kazymyra, Irena ; Blyzniuk, M. ; Farmaga, Ihor
Author_Institution
Radio Eng. Fac., Lviv Polytech. Nat. Univ., Ukraine
fYear
2001
fDate
12-17 Feb. 2001
Firstpage
166
Lastpage
167
Abstract
The problem of obtaining the information on ICs schematic vulnerability to local temperatures influence at early stages of design is considered. The technique of automatic-synthesis of the simplified models on the basis of the theory of design of computer simulation experiments is considered as well. The specific features of the synthesised efficient simplified models reflecting the ICs schematic vulnerability to local temperatures are analysed.
Keywords
circuit CAD; circuit simulation; integrated circuit design; integrated circuit modelling; IC model; automatic synthesis; computer simulation; local temperature; schematic vulnerability; Circuit synthesis; Computer simulation; Design optimization; Information analysis; Integrated circuit layout; Integrated circuit modeling; Integrated circuit synthesis; Temperature dependence; Temperature distribution; Temperature sensors;
fLanguage
English
Publisher
ieee
Conference_Titel
CAD Systems in Microelectronics, 2001. CADSM 2001. Proceedings of the 6th International Conference. The Experience of Designing and Application of
Conference_Location
Lviv-Slavsko, Ukraine
Print_ISBN
966-553-079-8
Type
conf
DOI
10.1109/CADSM.2001.975795
Filename
975795
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