• DocumentCode
    2086027
  • Title

    A residue to binary converter for the {2n + 2, 2n + 1, 2n} moduli set

  • Author

    Gbolagade, Kazeem Alagbe ; Cotofana, Sorin Dan

  • Author_Institution
    Comput. Eng. Lab., Delft Univ. of Technol., Delft
  • fYear
    2008
  • fDate
    26-29 Oct. 2008
  • Firstpage
    1785
  • Lastpage
    1789
  • Abstract
    In this paper, we investigate residue number system (RNS) to decimal conversion for a three moduli set with a common factor. We propose a new RNS to binary converter for the moduli set {2n + 2, 2n + 1, 2n} for any even integer n > 0. First, we demonstrate that for such a moduli set, the computation of the multiplicative inverses can be eliminated. Secondly, we simplify the Chinese Remainder Theorem (CRT) to obtain a reverse conveter that uses mod-n instead of mod-(2n+2)(2n) or mod-2n required by other state of the art equivalent converters. Next, we present a low complexity implementation that does not require explicit use of the modulo operation in the conversion process as it is normally the case in the traditional CRT and other state of the art equivalent converters. In terms of area, our proposal requires four 2:1 adders and 2 multipliers while the best state of the art equivalent converter requires one 3:1 adder, two 2:1 adders, and four multipliers. In terms of critical path delay, our scheme requires 3 additions and 1 multiplication with mod-n operations whereas the best state of the art equivalent converter requires 2 additions and 2 multiplications with mod-2n operations. Consequently, our scheme outperforms state of the art converters in terms of area and delay. Moreover, due to the fact that our scheme operates on smaller magnitude operands, it requires less complex adders and multipliers, which potentially results in even faster and smaller implementations.
  • Keywords
    adders; multiplying circuits; residue number systems; Chinese remainder theorem; adder; binary converter; common factor; critical path delay; decimal conversion; moduli set; modulo operation; multiplicative inverse computation; multiplier; residue number system; Cathode ray tubes; Data conversion; Delay; Digital signal processing; Fault tolerant systems; Hardware; Image converters; Laboratories; Parallel processing; Proposals; Chinese Remainder Theorem; Moduli Set With Common Factors; Multiplicative Inverses; RNS-Decimal Conversion; Residue Number System;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2008 42nd Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA
  • ISSN
    1058-6393
  • Print_ISBN
    978-1-4244-2940-0
  • Electronic_ISBN
    1058-6393
  • Type

    conf

  • DOI
    10.1109/ACSSC.2008.5074734
  • Filename
    5074734