Title :
Simulation of a lateral trench IGBT with p+ diverter for improving latch-up characteristics
Author :
Kang, Ey Goo ; Moon, Seung Hyun ; Kim, Sangsig ; Sung, Man Young
Author_Institution :
Dept. of Electr. Eng., Korea Univ., Seoul, South Korea
Abstract :
A new lateral trench insulated gate bipolar transistor (LTIGBT) with a p+ diverter is proposed to improve the characteristics of the conventional LTIGBT. The p+ divert layer was placed between the anode and cathode. Generally, if the conventional LTIGBT had a p+ divert region, the forward blocking voltage of the device was decreased greatly because the n-drift layer, corresponding to the punch-through region, was decreased. However, the forward blocking voltage of the proposed LTIGBT with a p+ diverter was about 140V. That of the conventional LTIGBT of the same size was no more than 105V. The forward blocking voltage of the proposed LTIGBT with p+ diverter increased 1.3 times that of the conventional LTIGBT. Because the p+ diverter region of the proposed device was enclosed trench oxide layer, the electric field moved toward trench-oxide layer, and punch through breakdown of LTIGBT with p+ diverter was occurred late. Therefore, the p+ diverter of the proposed LTIGBT didn´t relate to breakdown voltage in a different way the conventional LTIGBT. The latch-up current densities of the conventional LTIGBT and proposed LTIGBT with p+ diverter were 540A/cm 2, and 1453A/cm2, respectively. The enhanced latch-up capability of the proposed LTIGBT with p+ diverter was obtained through holes in the current directly reaching the cathode via the p+ divert region and p+ cathode layer beneath the n+ cathode layer
Keywords :
anodes; bipolar transistor switches; cathodes; insulated gate bipolar transistors; power bipolar transistors; power semiconductor switches; semiconductor device models; 105 V; 140 V; anode; breakdown voltage; cathode; electric field; enhanced latch-up capability; forward blocking voltage; latch-up characteristics improvement; lateral trench IGBT; n+ cathode layer; p+ cathode layer; p+ diverter; punch through breakdown; Anodes; Cathodes; Charge carrier processes; Current density; Electric breakdown; Electrodes; Insulated gate bipolar transistors; Moon; Numerical simulation; Voltage;
Conference_Titel :
Industrial Electronics Society, 2001. IECON '01. The 27th Annual Conference of the IEEE
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-7108-9
DOI :
10.1109/IECON.2001.975862