Optimization of phase change RAM write performance for large memory array

Author

Philipp, Jan Boris ; Ruf, Bernhard ; Rüster, Christian ; Andres, Dieter ; Majewski, Petra ; Kund, Michael ; Happ, Thomas D. ; Bergmann, Renate

Author_Institution

Qimonda AG, Unterhaching, Germany

fYear

2008

fDate

11-14 Nov. 2008

Firstpage

1

Lastpage

3

Abstract

This paper analyzes the crystallization statistics and optimizes the performance of complex doped GST on 256 kb memory arrays in 180 nm CMOS technology. A novel method of deriving an optimized SET strategy from the RESET current distribution is developed. This significantly improves performance and results in 200 ns SET time. A large Rreset/Rset ratio can be maintained even after 8E6 cycles.

Keywords

CMOS memory circuits; phase change memories; CMOS technology; GST; RESET current distribution; byte rate 256 kByte/s; crystallization statistics; large memory array; phase change RAM write; size 180 nm; time 200 ns; CMOS technology; Crystallization; Current distribution; Optimization methods; Performance analysis; Phase change random access memory; Phased arrays; Random access memory; Statistical analysis; Statistical distributions; PCRAM; chalcogenide; doping; mushroom; set;

fLanguage

English

Publisher

ieee

Conference_Titel

Non-Volatile Memory Technology Symposium, 2008. NVMTS 2008. 9th Annual

Conference_Location

Pacific Grove, CA

Print_ISBN

978-1-4244-3659-0

Electronic_ISBN

978-1-4244-2411-5

Type

conf

DOI

10.1109/NVMT.2008.4731185

Filename

4731185