VLSI design of a bus arbitration module for the 68000 series of microprocessors

Modern computer systems often are designed around a bus architecture. This, of course eliminates the need for complete point-to-point interconnection of all the devices attached to the bus. The major hurdle to this system is in resolving the conflicts that arise when more than one device wants to use the bus to communicate at a time. The job of resolving such conflicts is left to bus arbitration circuitry. A system designer using the MC68000 family is in some luck. This series of microprocessors has a limited set of lines built in to allow for external circuitry to request and receive the bus from the processor. However, having given up the bus the processor does nothing to decide who receives the bus next. This is left to external arbitration circuitry. This paper describes a VLSI chip designed to perform bus arbitration for the Motorola MC68000 series of microprocessors. With such a module, several devices (such as DMA, I/O controllers, and multiple microprocessors) can share a single bus while our device handles all bus conflicts using a priority scheme. The device is flexible, programmable, and compatible with the MC68000 family´s bus architecture and their support chips