DocumentCode
2090001
Title
Task Dispersal Measurement in Dynamic Reconfigurable NoCs
Author
Hosseinabady, Mohammad ; Nunez-Yanez, Jose L. ; Coppola, Antonio Marcello
Author_Institution
Dept. of Electr. & Electron. Eng., Univ. of Bristol, Bristol, UK
fYear
2010
fDate
5-7 July 2010
Firstpage
167
Lastpage
172
Abstract
Large Network-on-Chips (NoCs) with thousands of tiles benefit from dynamic task mapping techniques in which the assignment of tasks to tiles is decided at run-time. Dynamic task mapping technique can suffer from fragmentation with free nodes being dispersed as application are mapped and released, continuously. Using these dispersed free tiles results in interference among the task traffics of different applications. The aim of this paper is to distinguish and measure the traffic contention among the tasks of an application (internal contention) and the tasks of different applications (external contention). External contention is one of the factors which decrease the application efficiency and increase the power consumption and latency. This paper also proposes a method to decrease the external contention during task mapping scenario. The proposed technique shows up to 66.34% reduction in external communication in comparison with state-of-the-art task mapping techniques.
Keywords
network-on-chip; reconfigurable architectures; dynamic reconfigurable NoC; dynamic task mapping techniques; network-on-chips; task dispersal measurement; Benchmark testing; Computer architecture; Dispersion; Equations; Partitioning algorithms; Resource management; Tiles; Dynamic Task Mapping; Network-on-Chips; Task Dispersal;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location
Lixouri, Kefalonia
Print_ISBN
978-1-4244-7321-2
Type
conf
DOI
10.1109/ISVLSI.2010.91
Filename
5572765
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