• DocumentCode
    2090043
  • Title

    An evolutionary computing approach to multilevel logic synthesis using various logic operations

  • Author

    Hozumi, Takahiro ; Kakusho, Osamu ; Yamato, Kazuharu

  • Author_Institution
    Dept. of Econ. & Inf. Sci., Hyogo Univ., Kakogawa, Japan
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    259
  • Lastpage
    264
  • Abstract
    This paper discusses the logic synthesis of multilevel circuits using various operations. We suppose target circuits having no loop back connections and usable any logic function in any part of the multilevel circuits. In this paper, we use MIN, MAX, TSUM and MODSUM functions as functions of logic gates. We minimize the circuit using the Genetic Algorithms. We encode each logic gate to the series of numbers representing a function and its connections and represent the circuit by a chromosome arranging the numbers for all logic gates. We show that our GAs can design a given function with more flexible structures
  • Keywords
    evolutionary computation; genetic algorithms; logic CAD; logic gates; multivalued logic; GAs; evolutionary computing; genetic algorithms; logic function; logic gates; multilevel circuits; multilevel logic synthesis; target circuits; Biological cells; Circuit synthesis; Costs; Flexible printed circuits; Genetic algorithms; Logic circuits; Logic functions; Logic gates; Minimization; Optimization methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on
  • Conference_Location
    Portland, OR
  • ISSN
    0195-623X
  • Print_ISBN
    0-7695-0692-5
  • Type

    conf

  • DOI
    10.1109/ISMVL.2000.848629
  • Filename
    848629