Title :
Cost-efficiency code generation approach of software pipelining for FPGA architectures
Author :
Shaodu, Lin ; Hongbin, Zheng ; Lin, Cheng ; Dihu, Chen ; Zixin, Wang
Author_Institution :
School of Physics and Engineering, Sun Yat-sen University, Guangzhou 510275, China
Abstract :
Software pipelining is an optimization algorithm, which is unrolling iteration to improve the executive efficiency by loop-unrolled technology. As the loop is unrolled by more times, we will get large bigger codes that we need the hardware resource sharply increased. To solve the problem which needs large hardware resource because of unrolling the loop, we propose a new approach which is reconstructing state to share state resource and establishing the finite state machine model of software pipelining. It is the cost-efficiency code generation approach of software pipelining. The model can fulfill to reuse hardware resource and need less hardware resource by using the FSM to control the reusing of kernel codes of the pipelining technology.
Keywords :
Computer architecture; Field programmable gate arrays; Hardware; IEEE Computer Society; Pipeline processing; Software; Software algorithms; FPGA; finite state machine(FSM); software pipelining; state reconstruction;
Conference_Titel :
Information Science and Engineering (ICISE), 2010 2nd International Conference on
Conference_Location :
Hangzhou, China
Print_ISBN :
978-1-4244-7616-9
DOI :
10.1109/ICISE.2010.5688885