Precision control of halo implantation for scaling-down ULSI manufacturing

This work is a study on process control of halo implants of MOS transistors in the ULSl manufacturing. We present the electrical test data corresponding to halo implant changes on the NMOS and PMOS transistors of a high density, high performance flash memory device of 0.11 μm technology node. The device threshold voltage is found to be sensitive to small variations in both implant and wafer orientation angles. It is observed that the PMOS device is more sensitive to angle changes than the NMOS device. A TCAD model is made to simulate the device characteristics and correlate the device performance.