DocumentCode :
2090260
Title :
Boundary conditions and solution for Si and poly-Si pitting defects induced by ion implanted PR popping during dry strip process
Author :
Chin, Woo Kah ; Ling, Sun Ling ; Schoonveld, Alex ; Gu, Yoon Hyun ; Ming, Chan Yee ; Swee, Goh Inn ; San, Pey Kin
Author_Institution :
System on Silicon Manuf. Co. Pte. Ltd., Singapore, Singapore
fYear :
2005
fDate :
13-15 Sept. 2005
Firstpage :
208
Lastpage :
211
Abstract :
This paper presents our study on the new mode of yield loss caused by Si and poly-Si pitting defects. This is due to ion implanted photoresist popping during high temperature dry strip process as a result of insufficient PR treatment, which exposed these areas to fluorine radicals attack. It was found that for popping to occur during dry strip process, two factors need to be considered, i.e. in terms of ion implant dosage and photoresist coverage, where both must be fulfilled. The solution to prevent Si and poly-Si pitting defects is also discussed and provided in this paper.
Keywords :
CMOS integrated circuits; MOSFET; crystal defects; elemental semiconductors; integrated circuit manufacture; ion implantation; photoresists; silicon; surface cleaning; Si; dry strip process; fluorine radicals attack; ion implant dosage; ion implantation; photoresist coverage; photoresist popping; pitting defects; yield loss; Boundary conditions; CMOS process; CMOS technology; Costs; Implants; Ion implantation; Resists; Silicon; Strips; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing, 2005. ISSM 2005, IEEE International Symposium on
Print_ISBN :
0-7803-9143-8
Type :
conf
DOI :
10.1109/ISSM.2005.1513337
Filename :
1513337
Link To Document :
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