A Receiver Circuit for Low-Swing Interconnect Schemes

This paper presents a new receiver circuit that is suitable for low-swing interconnect schemes in CMOS nanometer technologies. Compared to the conventional receiver, which utilizes a PMOS feedback transistor, the proposed configuration is based on an auxiliary cross-coupled structure, which provides significant reduction of the delay time and eliminates the short circuit current, during transitions. The new receiver outperforms the conventional one, especially when very low power supply voltages are used and large capacitive loads are driven. The proposed topology has been designed in a 90nm CMOS technology and the simulation results confirm that, with respect to the conventional receiver, the delay and energy savings may approach 87% and 60% respectively.