Title :
A multilevel-cell 32 Mb flash memory
Author :
Bauer, M. ; Alexis, R. ; Atwood, G. ; Baltar, B. ; Fazio, A. ; Frary, K. ; Hensel, M. ; Ishac, M. ; Javanifard, J. ; Landgraf, M. ; Leak, D. ; Loe, K. ; Mills, D. ; Ruby, P. ; Rozman, R. ; Sweha, S. ; Talreja, S. ; Wojciechowski, K.
Author_Institution :
Intel Corp., Folsom, CA, USA
Abstract :
A flash memory with multilevel cell significantly reduces the memory per-bit cost. A 32 Mb multilevel-cell (MLC) flash memory storing two bits of data per cell achieves 32 Mb memory storage capacity using 16 M flash memory cells. This 32 Mb flash memory on a 0.6 μm process has a 2.0×1.8 μm2 flash cell. In MLC operation, the logical flash memory cell achieves two bits per cell using four possible states, defined by four flash cell threshold voltage ranges. The relationship between the threshold voltage ranges stored in the first memory cell and the corresponding logic levels is shown in this paper, which also shows a plot of the four threshold voltage distributions, each with a separation range
Keywords :
flash memories; integrated memory circuits; multivalued logic circuits; 32 Mbit; MLC operation; flash cell threshold voltage; flash memory; logical flash memory; multilevel cell; storage capacity; Circuits; Costs; Flash memory; Flash memory cells; Java; Latches; Logic; Milling machines; Pulse amplifiers; Threshold voltage;
Conference_Titel :
Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on
Conference_Location :
Portland, OR
Print_ISBN :
0-7695-0692-5
DOI :
10.1109/ISMVL.2000.848644