DocumentCode
2090474
Title
Ultra-thin film SOI/CMOS with selective-epi source/drain for low series resistance, high drive current
Author
Hwang, J.M. ; Wise, R. ; Yee, E. ; Houston, T. ; Pollack, G.P.
Author_Institution
Semicond. Process & Design Center, Texas Instrum. Inc., Dallas, TX, USA
fYear
1994
fDate
7-9 June 1994
Firstpage
33
Lastpage
34
Abstract
A self-aligned selective epitaxial technique is used to overcome the high source/drain resistance problem in ultra-thin film SOI/CMOS devices. Very low series resistances, comparable to those for bulk CMOS devices, are demonstrated with this selective-epi source/drain.<>
Keywords
CMOS integrated circuits; SIMOX; integrated circuit technology; semiconductor-insulator boundaries; silicon; SIMOX; drive current; selective-epi source/drain; self-aligned selective epitaxial technique; series resistance; ultra-thin film SOI/CMOS; Annealing; Boron; Immune system; Implants; MOS devices; Medical simulation; Semiconductor films; Silicon; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1994. Digest of Technical Papers. 1994 Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-1921-4
Type
conf
DOI
10.1109/VLSIT.1994.324391
Filename
324391
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