Title :
Modeling and Simulation of Multi-operation Microcode-Based Built-In Self Test for Memory Fault Detection and Repair
Author :
Sharma, R.K. ; Sood, Aditi
Author_Institution :
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol., Kurukshetra, India
Abstract :
As embedded memory area on-chip is increasing and memory density is growing, problem of faults is growing exponentially. Newer test algorithms are developed for detecting these new faults. These new March algorithms have much more number of operations than the March algorithms existing earlier. An architecture implementing these new algorithms is presented here. This is illustrated by implementing the newly defined March SS algorithm. Along with the fault diagnosis a word-oriented memory Built-in Self Repair methodology, which supports on-the-fly memory repair, is employed to repair the faulty locations indicated by the MBIST controller presented.
Keywords :
built-in self test; fault diagnosis; March algorithms; fault diagnosis; memory fault detection; multi-operation microcode-based built-in self test; Algorithm design and analysis; Arrays; Built-in self-test; Circuit faults; Clocks; Maintenance engineering; Redundancy; Built-In Self Repair (BISR); Built-In Self Test (BIST); Defect-Per Million (DPM); Memory Built-In Self Repair (MBISR); Memory Built-in Self Test (MBIST); Microcoded MBIST;
Conference_Titel :
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location :
Lixouri, Kefalonia
Print_ISBN :
978-1-4244-7321-2
DOI :
10.1109/ISVLSI.2010.88