Temperature and channel-length dependence of impact ionization in p-channel MOSFETs

The impact ionization (II) current of p-channel MOSFETs designed for 0.1 /spl mu/m operation has been investigated as a function of temperature and channel length, L/sub ch/ down to 0.1 /spl mu/m. It has been experimentally observed that at any channel length, the substrate current to source current ratio, I/sub R/, decreases with decreasing lattice temperature. The temperature behavior of the II multiplication measured here is opposite to that in bulk. Such a temperature dependence of I/sub R/, has been already observed for n-MOSFETs but, to our knowledge, has never been reported in p-MOSFETs. Also, the minimum drain bias for which II is observed is V/sub DS/=1.3 V for the 0.1 /spl mu/m p-MOSFET devices, which is substantially higher than that observed in deep sub-micron n-MOSFETs. Furthermore, I/sub R/ is found to increase with decreasing L/sub ch/. Insight into the physical mechanisms behind these phenomena is given through full band Monte Carlo simulations.<>