A 4.2 mm $^{2}$ 72 mW Multistandard Direct-Conversion DTV Tuner in 65 nm CMOS

This paper presents a direct-conversion DTV tuner for both VHF and UHF bands. The proposed tuner achieves a noise figure of 2.5-3.5 dB at VHF band and 2-3 dB at UHF band while the LNA consumes only 3.5 mW. An external band-pass LC filter is adopted for RF pre-filtering and providing DC conduction path for noise cancelling balun LNA. The system-level co-design of the LNA and pre-selecting filter further help to obtain 33 dB third-order harmonic rejection ratio without using harmonic rejection mixers. A quantization-noise-compensated fractional- N frequency synthesizer is implemented, achieving 0.5 ^° integrated phase error (1 kHz to 4 MHz) at 666 MHz, and suppressing out-of-band ΣΔ noise by 20 dB. The proposed PLL injects compensation current into the loop filter during the PFD delay time, which precisely tracks the VCO output frequency. Highly reconfigurable analog baseband with 0.5-4 MHz bandwidth and 6-54 dB gain is integrated. The tuner is implemented in 65 nm CMOS process, occupies an area of 4.2 mm², and consumes only 72 mW from a 1.2 V voltage supply.