A compact inverted-spacer TFT for high-density SRAMs

Author

Pfiester, J.R. ; Lin, J.-H. ; Mocala, K. ; Ku, Y.-C. ; Higman, J. ; McNelly, T. ; Blackwell, M. ; Kaushik, V. ; James, B.M. ; Hegde, R.I.

Author_Institution

Adv. Products Res. & Dev. Lab., Motorola Inc., Austin, TX, USA

fYear

1994

fDate

7-9 June 1994

Firstpage

101

Lastpage

102

Abstract

Polysilicon thin-film transistors (TFT) are typically used in high-density SRAMs due to their low standby power dissipation and high on/off current ratio. However, as the bitcell area continues to decrease for higher density SRAMs circuit applications, less space is available for integrating the TFT into the bitcell. In this paper, a new TFT structure is proposed which is self-aligned to the underlying NMOS device, thereby providing a compact load element that exhibits excellent device performance at reduced power-supply voltages. The inverted-spacer TFT channel is formed in a narrow poly-filled lateral cavity around the inside perimeter of the bulk NMOS polysilicon gate stack.<>

Keywords

MOS integrated circuits; SRAM chips; integrated circuit technology; thin film transistors; Si; bitcell area; bulk NMOS polysilicon gate stack; device performance; high-density SRAMs; inverted-spacer TFT; load element; on/off current ratio; poly-filled lateral cavity; polysilicon thin-film transistors; reduced power-supply voltages; self-aligned structure; standby power dissipation; Annealing; Dielectrics; Dry etching; Laboratories; MOS devices; Oxidation; Random access memory; Research and development; Resists; Thin film transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1994. Digest of Technical Papers. 1994 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-1921-4

Type

conf

DOI

10.1109/VLSIT.1994.324435

Filename

324435