Bitstream Efficiency of Field Programmable One-Hot Arrays

Field Programmable One-Hot Arrays (FPOHAs) have simple cells which are suitable to implement control-rich algorithms, where one-hot encoding is preferred. We present the cell design for the FPOHA and describe a modified open-source one-hot tool, known as Verilog Implicit To One-hot (VITO), to synthesize one-hot designs into FPOHA configurations without global optimization. We compare the bitstream sizes for FPOHAs and FPGAs using artificial benchmarks. In theory, optimal FPOHA layouts could have bitstream sizes half that of FPGAs. The observed FPOHA sizes synthesized from VITO may not be optimal, but are still often more efficient than FPGA sizes.