DocumentCode :
2091820
Title :
Combining Unspecified Test Data Bit Filling Methods and Run Length Based Codes to Estimate Compression, Power and Area Overhead
Author :
Mehta, Usha S. ; Devashrayee, Niranjan M. ; Dasgupta, Kanker S.
Author_Institution :
EC, Nirma Univ., Ahmedabad, India
fYear :
2010
fDate :
5-7 July 2010
Firstpage :
448
Lastpage :
449
Abstract :
The data compression of any partially specified test data depends upon how the unspecified bits are filled with 1s and 0s. In this paper, the five different approaches for don´t care bit filling based on nature of runs are proposed. These methods are used here to predict the maximum compression based on entropy relevant to different run length based data compression code. These methods are also analyzed for test power and area overhead corresponding to run length based codes. The results are shown with various ISCAS circuits.
Keywords :
VLSI; data compression; logic circuits; maximum entropy methods; runlength codes; ISCAS circuits; area overhead estimation; data compression code; don´t care bit filling; entropy; power estimation; run length-based codes; unspecified test data bit filling methods; Encoding; Entropy; Filling; System-on-a-chip; Test data compression; Testing; Code Based Data Compression Methods; Compression Predicted by Entropy; EFDR; FDR; MFDR; Unspecified Test Data;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location :
Lixouri, Kefalonia
Print_ISBN :
978-1-4244-7321-2
Type :
conf
DOI :
10.1109/ISVLSI.2010.18
Filename :
5572838
Link To Document :
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