Logic Minimization Based on Dual Logic

Based on the disjointed products and by using logic decomposition techniques, a logic function´s cover is divided into two parts which are suitable for RM logic implementation and Boolean logic implementation respectively. Then the function is minimized with both RM logic and Boolean logic (dual logic) at the same time. Further, a method of the functional verification for dual logic is also proposed by checking whether the covers of two functions are equal or not. The proposed minimization algorithm is implemented in C and tested on MCNC benchmarks. The experimental results show that for the most test cases the proposed dual logic minimization algorithm produces less products compared with that of ESPRESSO.