Potential NRG: placement with incomplete data

Traditional placement problems are studied under a fully specified cell library and a complete netlist. However, in the first, e.g., 2 years of a 2-3 year microprocessor design cycle, the detailed netlist is unavailable. For area and performance estimation, layout must nevertheless be done with incomplete information. Another source of incompleteness comes from reuse of instances from earlier design generations; these instances and their parameters will change as the project evolves. The problem of placement with incomplete data (PID) can be abstracted as having to place a circuit when p/sub c/% of the cells and p/sub n/% of the nets are missing. The key challenge in PID is how to add missing cells and nets. In this paper, two "patching-methods" for adding missing nets and cells are proposed. The methods are called abstraction and fusion. Experimental results are very interesting and illustrative. First, they show that PID is a difficult problem and an arbitrary (and perhaps intuitively sound) method may not produce high-quality results. Experiments verify that the abstraction method is a very good predictor and that fusion is not because circuits produced by abstraction attain much of the properties of the original circuits. Summary Table 3 in Section 4 shows that when a circuit has 10% incompleteness, abstraction can predict the final total wirelength with an error of 5.8%, while fusion has a 67.8% error in predicting the wirelength in the same circuit.