Title :
Reduced Hardware Systolic Solutions to the Discrete Hartley Transform
Author :
Wang, L. ; Hartimo, I.
Author_Institution :
Helsinki University of Technology, Finland
Keywords :
Added delay; Arithmetic; DH-HEMTs; Discrete transforms; FETs; Global communication; Hardware; Kernel; Systolic arrays; Very large scale integration;
Conference_Titel :
Digital Signal Processing workshop, 1992. The
DOI :
10.1109/DSPWS.1992.665548