Title :
The Refresh Efficiency on Difference Processor Cache Architecture
Author :
Liu, Zheng ; Sun, Weizhen
Author_Institution :
Coll. of Inf. Eng., Capital Normal Univ., Beijing, China
Abstract :
Cache is important for the performance of processor. With the multi-core developed, cache architecture for the performance of multi-core processor has begun to emerge. Through the result of running a test program for parallel computing obtains the phenomenon, this article analyses the reason of it occurred. It summarizes that the L2 cache architecture has an impact the performance of multi-core processor. The result proves the shared L2 cache architecture, which has effect on the performance of multi-core processor, when all of cores are full load.
Keywords :
cache storage; parallel processing; shared memory systems; multicore processor; parallel computing; refresh efficiency; shared L2 cache architecture; Computer architecture; Computer science; Concurrent computing; Displays; Educational institutions; Hardware; Multicore processing; Parallel processing; Sun; Testing; Cache Architecture; Multi-Core Processor; Refresh Efficiency;
Conference_Titel :
Computer Science and Computational Technology, 2008. ISCSCT '08. International Symposium on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-3746-7
DOI :
10.1109/ISCSCT.2008.182