DocumentCode
2093925
Title
An on-board 47-GHz phose-locked oscillator using FET gate bias control for low phase noise
Author
Ishii, Kyoichi ; Yamamoto, Tetsuo ; Shigaki, Masafumi ; Hongo, Hironobu ; Iwatsuki, Masanori
Author_Institution
Space Communications Research Corporation, Hoyakawa Tonakai, Bldg. 2-12-5, Iwamoto-Cho, Chiyoda-Ku, Tokyo 101 Japan. Tel: +81 3 3865 8761, Fax: +81 3 3865 8765
fYear
1993
fDate
6-10 Sept. 1993
Firstpage
767
Lastpage
769
Abstract
We have developed an on-board 47-GHz phase locked oscillator (PLO) for millimeter-wave personal satellite communications system. For low phase-noise operation, we developed an osciplier using PET gate bias control technique, and used a sampling phase detector. We developed a noise addition model for accurate design. The phase noise of this 47-GHz PLO was an exceptionally low ¿63, ¿85, and ¿100 dBc/Hz at offset frequencies of 100 Hz, 1 kHz, and 100 kHz.
Keywords
Communication system control; Detectors; FETs; Millimeter wave technology; Oscillators; Phase detection; Phase noise; Positron emission tomography; Sampling methods; Satellite communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 1993. 23rd European
Conference_Location
Madrid, Spain
Type
conf
DOI
10.1109/EUMA.1993.336698
Filename
4136759
Link To Document