CGE: automatic generation of controllers in the CATHEDRAL-II silicon compiler

This paper describes the efforts done within the framework of the CATHEDRAL-II silicon compiler towards automatic controller generation. The program CGE (Controller Generation Environment) maps a microcode description generated by Atomics, an RT scheduler, onto a target controller architecture. The program produces logic, structure and layout descriptions of the constituent blocks. The controller architecture has been chosen to suit most of the audio, speech, telecom and back-end image processing real time algorithms (throughputs up to 1 MHz)