Study on the power bus noise isolation using a SPICE compatible method

Author

Liu, Zhi Hong ; Li, Er Ping ; See, Kye Yak ; Liu, En Xiao

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore

Volume

2

fYear

2005

fDate

8-12 Aug. 2005

Firstpage

438

Abstract

In nowadays high speed PCB design, the normal operation of the analog integrated circuits depends much on the stable voltage supply between DC power and ground. To maintain the signal fidelity and mitigate the effect of SSN (simultaneous switching noise) on the power signal, power bus plane segmentation and noisy device isolation using power island are often employed. This paper proposed one method that can simulate the effects of the power bus noise isolation using the SPICE compatible method to provide the strategy to the IC design.

Keywords

SPICE; integrated circuit design; IC design; SPICE compatible method; analog integrated circuits; high speed PCB design; noisy device isolation; power bus noise isolation; power bus plane segmentation; power island; signal fidelity; simultaneous switching noise mitigation; voltage supply; Analog integrated circuits; Circuit simulation; Digital integrated circuits; Finite difference methods; High speed integrated circuits; Integrated circuit noise; SPICE; Scattering parameters; Switching circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electromagnetic Compatibility, 2005. EMC 2005. 2005 International Symposium on

Print_ISBN

0-7803-9380-5

Type

conf

DOI

10.1109/ISEMC.2005.1513554

Filename

1513554