Analysis of gate currents through high-k dielectrics using a Monte Carlo device simulator [MOSFET applications]

Author

Ohkura, Y. ; Suzuki, C. ; Amakawa, H. ; Nishi, K.

Author_Institution

Semicond. Leading Edge Technol., Inc, Tsukuba, Japan

fYear

2003

fDate

3-5 Sept. 2003

Firstpage

67

Lastpage

70

Abstract

The gate current through high-k dielectrics has been calculated by a Monte Carlo simulator. In high-k dielectrics, the gate current from the drain edge is dominant and is quite serious due to a lowering of the barrier height with an increasing dielectric constant. The stack structure of high-k dielectric and oxide films is effective to suppress gate current densities generated from high-energy carriers generated near the drain edge.

Keywords

MOSFET; Monte Carlo methods; current density; dielectric materials; permittivity; semiconductor device models; Monte Carlo device simulator; barrier height lowering; dielectric constant; drain edge gate current; gate current analysis; gate current density; high-energy carriers; high-k dielectrics; oxide film stack structure; Analytical models; Dielectric constant; Electrons; High K dielectric materials; High-K gate dielectrics; MOSFETs; Monte Carlo methods; Probability; Tunneling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. International Conference on

Conference_Location

Boston, MA, USA

Print_ISBN

0-7803-7826-1

Type

conf

DOI

10.1109/SISPAD.2003.1233639

Filename

1233639