A VLSI system to speedup the measurement of the system frequency

Author

Alturaigi, M.A.

Author_Institution

Dept. of Electr. Eng., King Saud Univ., Riyadh, Saudi Arabia

Volume

2

fYear

2000

fDate

2000

Firstpage

947

Abstract

One of the approaches to measure the power system frequency is by the least squares method. This method involves huge computation, which is time consuming using a general purpose microprocessor-based system. In this paper, a parallel processing system to speedup the computation of frequency is introduced. The operation and the structure of the array is explained. The size and the computation time of the system are evaluated. It is shown that the proposed system speeds up the computation by at least two orders of magnitude. The system is well suited for VLSI implementation

Keywords

VLSI; computational complexity; data flow computing; frequency measurement; least squares approximations; matrix multiplication; power system analysis computing; power system measurement; systolic arrays; Taylor series; VLSI implementation; computation time; data flow design; least squares method; matrix multiplication; measurement speedup; parallel processing system; power system frequency measurement; reduced complexity; systolic array; Equations; Frequency measurement; Least squares methods; Parallel processing; Power system measurements; Power system relaying; Taylor series; Velocity measurement; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2000. IMTC 2000. Proceedings of the 17th IEEE

Conference_Location

Baltimore, MD

ISSN

1091-5281

Print_ISBN

0-7803-5890-2

Type

conf

DOI

10.1109/IMTC.2000.848871

Filename

848871