• DocumentCode
    2096407
  • Title

    A fast fanout optimization algorithm for near-continuous buffer libraries

  • Author

    Kung, David S.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    1998
  • fDate
    19-19 June 1998
  • Firstpage
    352
  • Lastpage
    355
  • Abstract
    This paper presents a gain-based fanout optimization algorithm for near-continuous buffer libraries. A near-continuous buffer library contains many buffers in a wide range of discrete sizes and each buffer ofa specific type satisfies a size-independent delay equation. The new fanout algorithm is derived from an optimal algorithm to a special fanout optimization problem for continuous libraries. The gainbased technique constructs fanout trees which have better timing at similar area cost. Since no combinatorial search over buffer sizes or fanout tree topologies is used, our execution time is up to 1000 times faster when compared to conventional fanout algorithms.
  • Keywords
    circuit optimisation; logic CAD; buffer library; fanout optimization; fanout trees; gate-sizing; logic synthesis; Capacitance; Costs; Delay; Equations; Inverters; Libraries; Logic gates; Permission; Timing; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1998. Proceedings
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-89791-964-5
  • Type

    conf

  • Filename
    724496