Title :
Simulation of nanofloating gate memory with high-k stacked dielectrics
Author :
Govoreanu, Bogdan ; Blomme, Pieter ; Van Houdt, Jan ; De Meyer, Kristin
Author_Institution :
SPDT Div., IMEC, Leuven, Belgium
Abstract :
Scaling of conventional floating gate nonvolatile memory cells towards the nanometer range is jeopardized by the lack of scalability of the tunnel oxide. In this paper, we discuss the advantages of using high-k materials for nanofloating gate memory structures by means of numerical device simulations.
Keywords :
flash memories; integrated circuit modelling; integrated memory circuits; nanotechnology; permittivity; semiconductor storage; conventional floating gate nonvolatile memory cells; high-k stacked dielectrics; nanofloating gate memory; simulation; tunnel oxide; CMOS technology; Character generation; Dielectric constant; Dielectric substrates; Doping; High K dielectric materials; High-K gate dielectrics; Nonvolatile memory; Threshold voltage; Tunneling;
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. International Conference on
Conference_Location :
Boston, MA, USA
Print_ISBN :
0-7803-7826-1
DOI :
10.1109/SISPAD.2003.1233696
